1. Field of the Invention
The present invention relates to a MOS varactor and to a voltage-controlled oscillator used as a VCTCXO (voltage-controlled temperature-compensated crystal oscillator).
2. Description of the Related Art
Recently, according to the rapid development of mobile communication equipment such as a mobile phone, the communication equipment has been required to additionally have various functions such as a temperature compensating function, a small size, and a high use frequency. For this reason, similar to the communication equipment, even in a crystal oscillator used as a reference of a communication frequency, a temperature compensating function, a small size, and a high use frequency has been required.
Since a temperature compensated crystal oscillator has a temperature compensating function and the frequency variation thereof due to temperature change is small, the temperature compensated crystal oscillator is widely used as a reference frequency source of a mobile phone and so on. A voltage-controlled oscillator has, as a load capacitor in an oscillating loop, a variable capacitive element capable of changing the capacitance by a voltage, and can change the capacitance value of the load capacitor by controlling a terminal voltage of the variable capacitive element so as to control a frequency. As the temperature compensating crystal oscillator, there is one in which a terminal voltage of a varactor of a voltage-controlled oscillator is controlled such that a temperature characteristic of a crystal vibrator (a piezoelectric resonator) is canceled.
Recently, the temperature-compensated crystal oscillator has been made to have a small size as well as low phase noise, short starting time, and high accuracy of the temperature compensation. In order to reduce the size of the crystal oscillator, the size of a crystal vibrator should also be reduced. However, the rate of the frequency variation to the variation of the variable capacitance generally tends to decrease as the crystal vibrator becomes small.
Consequently, it is necessary to make the variation in the capacitance of a varactor used as a load capacitor with respect to a control voltage large. For example, as disclosed in JP-A-2003-318417 and JP-A-11-220329, it is possible to make the variation in the capacitance value with respect to the variation of the control voltage large by using an electrostatic capacitance generated between source/drain terminals and a gate terminal of a MOS transistor, thereby capable of improving the sensitivity of the crystal oscillator with respect to frequency variation (see FIG. 5).
For example, as an example of the voltage-controlled oscillator shown in FIG. 6, a voltage-controlled oscillator has been proposed in which first and second MOS transistors 5 and 6 serving as varactors are connected to both terminals of an amplifier having a feedback resistor 1 and an inverter 2 and both terminals of a piezoelectric resonator 3. In the varactors, source/drain terminals of the first and second MOS transistors 5 and 6 are short-circuited, and an electrostatic capacitance generated between the source/drain terminals and a gate terminal of each of the first and second MOS transistors 5 and 6 is controlled by a voltage source 7 connected to the gate terminal.
FIG. 7 is a view showing the configuration of a MOS varactor. The MOS varactor is composed of a thin silicon oxide film 12 and an N-type polysilicon gate electrode 13 formed on a P-type semiconductor substrate 11. The MOS varactor is a two-terminal variable capacitor which uses a bulk terminal 14 connected to the semiconductor substrate 11 as a ground potential and uses a gate terminal 15 connected to the gate electrode 13 for both a capacitive terminal and a control terminal. A flat band voltage of the MOS configuration is denoted by a symbol ‘VFB’ and a threshold voltage when an inversion layer is generated on a surface of the semiconductor substrate 11 is denoted by a symbol ‘VTH’.
When a gate voltage Vg is lower than the VFB, as shown in a schematical configuration view of FIG. 7A, holes 16 are drawn and accumulated on a surface of the semiconductor substrate 11. At this time, the MOS capacitance is composed of only a capacitance Cox of a gate oxide film to be maximal, as shown in an equivalent circuit diagram of FIG. 7B.
Next, when the gate voltage is higher than the VFB, as shown in a schematically configuration view of FIG. 7B, a depletion layer 17 is formed on the surface of the semiconductor substrate 11. Therefore, the MOS capacitance becomes a series capacitance of the capacitance Cox of the gate oxide film and the capacitance of the depletion layer as shown in an equivalent circuit diagram of FIG. 7B. As a result, the MOS capacitance is reduced as the gate voltage increases.
Subsequently, when the gate voltage reaches the VTH, as shown in a schematical configuration view of FIG. 7C, a few electrons are induced on the surface of the semiconductor substrate 11 such that an inversion layer 18 is formed and the depletion layer 17 becomes wider than the inversion layer.
In the MOS varactor, when the gate voltage of a MOS transistor corresponds to the sum of the source terminal voltage and a threshold voltage, a channel is formed right under the gate oxide film and an electrostatic capacitance between the gate terminal and the channel, that is, the source terminal increases (the voltage is referred to as ‘a capacitance changing voltage’). In this case, the capacitance between the source terminal and the bulk terminal corresponds to the sum of the capacitance Cdj between the channel and the bulk and the capacitance Cd of the depletion layer and a voltage is applied to the gate terminal such that the gate terminal is AC grounded. Therefore, it can be seen that the capacitance between the source terminal and the bulk terminal is in a grounded state, As a result, the capacitance between the source terminal and the grounded terminal is composed of the capacitance Cox of the gate silicon film, the capacitance Cdj between the channel and the bulk, and the capacitance Cd of the depletion layer. At this time, the MOS capacitance becomes maximal.
The above-mentioned MOS varactor according to the related art has a problem in that, in a general CMOS process, the electrostatic capacitance between the source terminal and the grounded terminal is changed by the variation of impurity concentration of the channel of the MOS transistor and the variation of impurity concentration of the N-type semiconductor region. For example, in a voltage-controlled oscillator using the example shown in FIG. 6, the variation of the oscillation frequency is large and the change of the capacitance changing voltage is large. In particular, it is difficult to arbitrarily determine the capacitance changing voltage and to control the frequency with a predetermined gate voltage as a center.